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Freescale Semiconductor /MK70F15WS /LCDC /LPCCR

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Interpret as LPCCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PW0 (0)CC_EN 0 (00)SCR0RESERVED 0 (0)LDMSK 0RESERVED0RESERVED

LDMSK=0, CC_EN=0, SCR=00

Description

LCDC PWM contrast control register

Fields

PW

Pulse-width
CC_EN

Contrast control enable

0 (0): Contrast control is off.

1 (1): Contrast control is on.
SCR

Source select

0 (00): Line pulse

1 (01): Pixel clock

2 (10): LCD clock

3 (11): Reserved
RESERVED

no description available
LDMSK

LD mask

0 (0): LD [23:0] is normal.

1 (1): LD [23:0] always equals 0.
RESERVED

no description available
RESERVED

no description available

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data